The FCT373T and FCT573T
consist of eight Latches
with three-state outputs for bus organized applications. When latch enable (LE) is HIGH, the ?ip-?ops appear transparent to the data. Data that meets the required set-up times are latched when LE transitions from HIGH to LOW. Data appears on the bus when the (OE) is LOW. When output enable is HIGH, the bus output is in the impedance state. In this mode, data may be entered into the Latches
is identical to the FCT373T except for the ?ow-through pinout, which simpli?es board design. The outputs are designed with a power-off disable feature to allow for live insertion of boards.