/ordering information These octal Buffers
drivers are designed specifically to improve the performance and density of 3-state memory-address drivers, Clock Drivers
and bus-oriented Receivers
The ?AHCT240 devices are organized as two 4-bit Buffers Line Drivers
with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the Resistor
is determined by the current-sinking capability of the driver.