Sigma-delta Stereo Analog-to-digital Converter

  The TLC320AD57C provides high-resolution signal conversion from analog to digital using oversampling sigma-delta technology. This device consists of two synchronous conversion paths. Also included is a decimation Filter after the Modulator as shown in the functional block diagram. Other functions provide analog filtering and on-chip timing and control. A functional block diagram of the TLC320AD57C is included in section 1.2. Each block is described in the Detailed Description section. 1.1 Features ? Single 5-V Power Supply ? Sample Rates (fs) up to 48 kHz ? 18-Bit Resolution ? Signal-to-Noise (EIAJ) of 97 dB ? Dynamic Range of 95 dB ? Total Signal-to-Noise+Distortion of 91 dB ? Internal Reference Voltage (Vref ) ? Serial Port Interface ? Differential Architecture ? Power Dissipation of 200 mW. Power-Down Mode for Low-Power Applications ? One Micron Advanced LinEPIC1Z? Process
Item: TLC320AD57C
File Size : 15 KB
Pages : 21 Pages

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Texas Instruments Incorporated
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