9-bit Bus-interface Flip-flop With 3-state Outputs

  The nine Flip-Flops are edge-triggered D-type Flip-Flops With the clock-enable (CLKEN) input low, the Flip-Flops store data on the low-to-high transitions of the clock. Taking CLKEN high disables the clock Buffer thus latching the outputs. The SN74BCT29823 has noninverting data (D) inputs. Taking the clear (CLR) input low causes the nine Q outputs to go low independent of the clock. A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for Interface or pullup components. The output enable (OE) does not affect the internal operation of the Flip-Flops Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN74BCT29823 is characterized for operation from 0?C to 70?C.
Item: SN74BCT29823
File Size : 8 KB
Pages : 5 Pages

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Texas Instruments Incorporated
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