10-bit Bus-interface Flip-flops With 3-state Outputs

  These 10-bit Flip-Flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider Buffer Registers I/O ports, bidirectional Bus Drivers with parity, and working Registers The ten Flip-Flops are edge-triggered D-type Flip-Flops On the positive transition of the clock (CLK) input, the Q outputs are true to the data (D) input. A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a highimpedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without Interface or pullup components.
Item: SN54AS821A
File Size : 10 KB
Pages : 6 Pages

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Texas Instruments Incorporated
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