Digital Bus Monitor Ieee Std 1149.1 Jtag Scan-controlled Logic/signature Analyzer

  The SN74ACT8994 digital bus monitor (DBM) is a member of the Texas Instruments SCOPE? testability integrated-circuit family. This family of components supports IEEE Standard 1149.1-1990 (JTAG) boundary scan to facilitate testing of complex circuit-board assemblies. The DBM is a boundary-scannable device designed to monitor and/or store the values of a digital bus up to 16 bits in width. It resides in parallel with the bus being monitored. Data at the D-input pins can be stored in a scannable random-access Memory (RAM). Up to 1024 words of 16 bits can be stored. A parallel-signature analysis (PSA) can be performed on the data or on the contents of Memory The PSA operations use a linear-feedback shift-register technique to compress data into a signature. The user can configure the device to mask any combination of data inputs and control the feedback used during PSA operations.
Item: SN74ACT8994
File Size : 19 KB
Pages : 11 Pages

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Texas Instruments Incorporated
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