Low-power Dual Bus Buffer Gate With 3-state Outputs

  /ORDERING INFORMATION The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased Battery life. This product also maintains excellent signal integrity (see Figure 1 and Figure 2). Static-Power Consumption ( mA) 100% 80% 60% 40% 20% 0% ? GND Dynamic-Power Consumption (pF) 100% Voltage - V 3.5 3 Switching Characteristics at 25 MHz ? 80% 60% 40% 20% AUP 2.5 2 1.5 1 0.5 0 Input Output 3.3-V Logic ? LVC 3.3-V ? Logic 0% AUP -0.5 0 ? 5 10 15 Single, dual, and triple Gates 20 25 Time - ns 30 35 40 45 AUP1G08 data at CL = 15 pF Figure 1. AUP ? The Lowest Power Family Figure 2. Excellent Signal Integrity 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. Copyright ? 2007?2008, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SN74AUP2G126 LOW-POWER DUAL BUS Buffer Gate WITH 3-STATE OUTPUTS SCES687B ? JANUARY 2007 ? REVISED JANUARY 2008 www.ti.com
Item: SN74AUP2G126
File Size : 66 KB
Pages : 16 Pages

Other Part Numbers in this pdf file

SN74AUP2G126YZPR   SN74AUP2G126YFPR  
Texas Instruments Incorporated
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