are octal Buffer Line Drivers
with 3-state outputs using a small-geometry BiCMOS technology. The output stages are a combination of bipolar and CMOS Transistors
that limit the output high level to two Diode
drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces the power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 64 mA. These devices are organized as two 4-bit Buffers Line Drivers
with separate active-low output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the Resistor
is determined by the current-sinking capability of the driver.