1 1 Differential-to-lvds Zero Delay Clock Generator

  The ICS8745BI-21 is a highly versatile 1:1 LVDS Clock Generator. The ICS8745BI-21 has a fully integrated PLL and can be configured as zero delay Buffer multiplier or divider, and has an output frequency range of 31.25MHz to 700MHz. The Reference Divider, Feedback Divider and Output Divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The external feedback allows the device to achieve ?zero delay? between the input clock and the output clock. The PLL_SEL pin can be used to bypass the PLL for system test and debug purposes. In bypass mode, the reference clock is routed around the PLL and into the internal output dividers. HiPerClockS? ICS
Item: ICS8745BI-21
File Size : 103 KB
Pages : 19 Pages

Other Part Numbers in this pdf file

ICS8745BI-21.   8745BMI-21T   8745BMI-21LFT   8745BMI-21LF   8745BMI-21  
Integrated Device Technology
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