is a high speed, low phase noise, Zero Delay Buffer
(ZDB) which integrates IDT?s proprietary analog/digital Phase locked loop
(PLL) techniques. It is identical to the ICS670-01
but with an increased maximum output frequency of 210 MHz. Part of IDT?s ClockBlocksTM family, the part?s zero delay feature means that the rising edge of the input clock aligns with the rising edges of the outputs giving the appearance of no delay through the device. There are two identical outputs on the chip. The FBCLK should be used to connect to the FBIN. Each output has its own output enable pin. The ICS670-03
is ideal for synchronizing outputs in a large variety of systems, from personal computers to data Communications
to video. By allowing off-chip feedback paths, the ICS670-03
can eliminate the delay through other devices. The 15 different on-chip multipliers work in a variety of applications. For other multipliers, including functional multipliers, see the ICS527.